Design of Computer Based 12 Lead ECG Using STM32F401 Microcontroller

Abstract


Introduction
The human heart is a vital organ that pumps blood throughout the body to ensure we can do daily routines and work. Heart function could have interfered if heart abnormalities were found and even caused heart disease, which could lead to death (Narvinda et al., 2017). A heart medical assessment is needed to know about the heart -------------------------------------- Darmawan et al., 2022/ J. Energy Mater. Instrum. Technol. Vol. 3 No. 4, 2022 condition and indication of heart disease. Electrocardiograph (ECG) is often used for heart medical assessment for their low cost and being able to monitor heart condition in real-time (Surtono & Pauzi, 2016).
ECG is a healthcare device that records the human heart's electrical activity (Nasiqin et al., 2015). The recorded heart electrical activity, also called ECG signal, can be used to assess heart condition and detect any sign of heart diseases, such as myocardial infarction and arrhythmia (Hsu et al., 2019).
For diagnostic applications, i.e., looking for signs of heart disease, an ECG capable of recording more than one lead is necessary. The typical standard for diagnostic ECG is 12 leads (I, II, III, aVR, aVL, aVF, V1 ... V6), where four electrodes are placed at the human extremities and six electrodes are placed at the human chest. The 12-lead ECG must be able to amplify the ECG signal with weak amplitude (around 0.5 -3 mV) without amplifying noise with a much larger amplitude. Therefore an ECG instrumentation amplifier is necessary to amplify the ECG signal while rejecting noise contaminating the ECG as much as possible (Hadiyoso et al., 2015).
In this research, we will designed a computer-based 12-lead ECG device using the STM32F401 microcontroller. Some previous research was done by Alam et al. (2018), which used Arduino Uno, and Pavani and Kumar (2017), which used the LPC1768 microcontroller. Arduino Uno is based on an AVR 8-bit microcontroller, which cannot do digital signal processing (DSP). At the same time, LPC1768 is an ARM Cortex-M3 32-bit microcontroller somewhat similar to Cortex-M4 but without a floating-point unit (FPU). Therefore it is harder to implement DSP. STM32F401 is an ARM Cortex-M4 32-bit microcontroller used as a low-cost DSP (Pratiwi, 2017) for real-time ECG digital filters. DSP is more accessible to implement with STM32F401 because it has FPU. Therefore the production cost and ECG circuit complexity are minimized, and more flexible to update the digital filter. ECG is connected to a computer via USB, integrated into STM32F401. The computer can display ECG signals in real-time, generate ECG medical records, have better data processing capability, and even have automatic interpretation using artificial intelligence (D'Mello & D'Souza, 2012).

Equipment and Parts
The equipment used in this research is a soldering iron, oscilloscope, function generator, ECG cable and electrodes, and PC/laptop. Parts used in this research are IC TL074, AD823, MCP3202, MCP4725, STM32F401 module, passive components (resistor, capacitor, etc), and active components (diode, transistor, etc).

Research Procedure
The procedure carried out in this research is as follow: 1. ECG hardware design. ECG hardware was designed based on the hardware block diagram, as shown in Figure 1. There are two blocks in ECG hardware: analog front-end (AFE) block and main block. AFE block amplifies the weak ECG signal from the human body while reducing common-mode noise using eight-channel differential amplifiers built using IC TL074 low noise op-amp. The ECG signal is further amplified again using an AD823 DC amplifier to ensure ADC can convert the signal without losing resolution. The DC amplifier works with DAC output to eliminate dc offset from electrode polarization voltage which could be causing AD823 to saturate and unable to output the ECG signal correctly.  Energy, Material, and Instrumentation Technology Vol. 3 No. 4, 2022 ATMEGA328 is used to bridge AFE control and STM32F401. The main block converts the amplified ECG signal to a digital signal using MCP3202 ADC, control the AFE block and DAC output, and applies digital filtering to the digital ECG signal from ADC using an STM32F401 microcontroller. The filtered signal is then sent to the computer via USB.
To ensure patient safety against electric shock from leakage current, which can be dangerous, the AFE and main block are isolated using a 6N137 optocoupler. 6N137 is a high-speed digital optoisolator with a 10 Mbit/s maximum data rate that can be used for high-speed data transfer between ADC and STM32F401 (Li et al., 2014).
The ECG block diagram in Figure 1 is expanded into a hardware schematics diagram for each block. Figure 2 is the AFE block schematic, and Figure 3 is the leading block schematic. Each ECG electrode has 10 AFE block inputs: R, L, F, N, C1 ... C6. Each input is connected to the TL074 differential amplifier, whose function is to amplify weak ECG signal referenced to F electrode input, as shown in Figure 2 (a). The voltage gain of the differential amplifier is set to 3 times. The differential amplifier rejects any common-mode noise signal (mostly from 50 Hz powerline interference).
The N electrode is connected to the right leg drive (RLD) output. RLD is used to further reduce 50 Hz powerline interference by applying the interference signal as negative feedback to the human body. Therefore the commonmode noise is much smaller, and the differential amplifier can eliminate the noise more efficiently. If the 50 Hz powerline noise is effectively rejected by the differential amplifier and RLD, then further signal to process is not needed, and ECG recording is preserved at the highest quality.
Sample-and-hold (S/H) and multiplexer shown in Figure 2 (b) is used to sample ECG signal from all differential amplifier outputs simultaneously. The multiplexer selects which channel (R, L, C1 ... C6) should be further amplified by a DC amplifier and converted by ADC. AD823 DC amplifier shown in Figure 2 (c) is used to amplify the ECG signal while removing dc offset using DAC output voltage. The DC amplifier gain is set to 128 times. Therefore the total ECG signal gain is 384 times. Darmawan et al., 2022/ J. Energy Mater. Instrum. Technol. Vol. 3 No. 4, 2022  The amplified ECG signal from the DC amplifier output is then converted to a digital signal using MCP3202 ADC. MCP3202 is a 12-bit ADC with a 200 ksps sampling rate and SPI interface, as shown in Figure 3 (a). ATMEGA328 uses the converted signal to control DAC output and transmit the signal to STM32F401 via an optoisolator in Figure 3 (b). Then STM32F401 applies digital filtering to the ECG signal and sends the result to the computer via USB. The computer displays the ECG signal in real time and generates ECG medical records using a GUI program created in Visual Studio 2019. ECG medical record is generated using six rows and two columns format, with each lead duration length of 5 seconds.
2. ECG software design. Two software are needed for the designed 12 lead ECG devices, firmware for STM32F401 and GUI program for the computer. Firmware for STM32F401 is used to control ECG hardware and do real-time digital filtering in software. The firmware was created using STM32CubeIDE following the flowchart in Figure 4.   Energy, Material, and Instrumentation Technology Vol. 3 No. 4, 2022 The GUI program in Visual Studio 2019 controls ECG hardware, displays 12 lead ECGs in real time and generates digital ECG medical reports. Figure 5 is the created GUI program. 3. Research data collection. Research data collection is done in two stages. The first stage is using a function generator for data collection. The second stage uses the designed ECG to record ECG signals from the human body. A function generator measures ECG technical specifications: gain, common-mode rejection ratio (CMRR), and frequency response. Then direct ECG recording from the human body is done to know whether the ECG can be used properly. Figure 6 is the designed computer based 12 lead ECG device and its supporting accessories, such as an ECG cable to connect the electrode to ECG and a USB cable to connect ECG to the computer.  Figure 7 shows the ECG's electronics circuit board assembled using a double-sided plated through-hole (PTH) perfboard. We combine through-hole (THT) and surface mount (SMD) components. Darmawan et al., 2022/ J. Energy Mater. Instrum. Technol. Vol. 3 No. 4, 2022

ECG Gain Measurement
ECG gain measurement was done using a 10 Hz sine wave test signal from a function generator, with the voltage varied from 1 to 5 mV. The designed gain value is 384 times. The designed ECG gain error should be less than +/-5% (AAMI, 2001). The measurement was done to all ECG inputs (R, L, C1 ... C6). Measurement results as a gain vs. input voltage chart in Figure 8. Based on Figure 8, the measured ECG gain was close to the designed value (384 times) but not precisely matched because of gain error. The gain error can be calculated using Equation 1.

− =
(1) For a typical input voltage of 1 mV, C6 has the slightest error of 0.26%. L and C2 have the most significant error of -4.95%. For input voltage more significant than four mV, ECG gain was getting smaller; therefore, the gain error is significantly larger than +/-5%. It can be concluded that the designed ECG can amplify weak signals up to 5 mV but with significant gain error for the input of more than four mV. Surtono A, Apriyanto D, andSupriyanto A, 2022, Design of Computer Based 12 Lead ECG Using STM32F401 Microcontroller, Journal of Energy, Material, andInstrumentation Technology Vol. 3 No. 4, 2022 The ECG gain error is due to defective electronic components and the quality of components used in ECG. The resistor used in our design is a 5% tolerance, much better than a 1% tolerance, and the gain error is reduced. The gain error can be further reduced to less than 0.5% for a more comprehensive input range of up to 1 V by using a modern custom circuit design (Xu & Hong, 2020).

ECG CMRR Measurement
ECG CMRR measurement was done using 20 Vrms or 56.56 Vp-p sine wave test signal from function generator feed through 100 pF capacitor to all ECG inputs connected. The test signal frequency varied from 0.05 to 200 Hz. Because our function generator can only generate signals up to 20 Vp-p, a step-up transformer is used to increase the test signal voltage. The minimum CMRR value is 95 dB (AAMI, 2001). Measurement results are shown as CMRR vs. frequency chart in Figure 9.  Figure 9, the CMRR value was constant over the test signal frequency range (0.05 -200 Hz), which is 115.05 dB, more than the minimum recommended CMRR value of 95 dB. Therefore the designed ECG can effectively reject 50 Hz powerline interference and its harmonics, thanks to the designed differential amplifier using TL074 and a practical RLD circuit. Better improvement can be made using a custom op-amp design which could boost the CMRR value to more than 132 dB (Yang, 2020). Further CMRR improvement can be made using digital RLD instead of analog RLD, rejecting only the powerline frequency components without disturbing the ECG frequency component (Haberman & Spinelli, 2012). More CMRR means that no post-processing is needed for powerline interference removal.

ECG Frequency Response Measurement
ECG frequency response was similar to gain measurement, but the test signal was changed to 1 mV sine wave, and frequency varied from 0.05 -1000 Hz. Measurement results are shown as magnitude vs. frequency chart in Figure 10. Figure 10. ECG frequency response chart Darmawan et al., 2022/ J. Energy Mater. Instrum. Technol. Vol. 3 No. 4, 2022 Based on Figure 10, the frequency response of each ECG channel is somewhat similar to each other. The magnitude was flat in the 0.05 -75 Hz frequency range and slowly declined at more than 75 Hz frequency. The frequency response curve is similar to a low-pass filter, which passes the signal from DC to the cut-off frequency and rejects the signal with a frequency higher than the cut-off frequency. Because the DC component is not essential in an ECG signal, any ECG frequency component below 0.05 Hz will be rejected by the digital filter programmed in STM32F401.
The upper frequency was determined using the -3 dB rule, which is the frequency where its magnitude is -3 dB lower than the magnitude at the center frequency. Looking at the chart in Figure 10, we can see the -3 dB point is at 200 Hz, which is the upper frequency. Therefore the measured ECG frequency response is 0.05 -200 Hz, suitable for diagnostic applications that require 0.05 -150 Hz frequency response (Young & Schmid, 2021).

Recording ECG from Human Body
The designed ECG is tested for directly recording ECG from the human body. We are using reusable clamps and suction electrodes to get the ECG signal from the body surface. The recording was done at the Electronics and Instrumentation Lab, Department of Physics, the University of Lampung, as shown in Figure 11. To minimize skinelectrode contact resistance, conductive non-allergic ECG gel is used. In this research, two participants are willing to participate in the ECG recording process, H (male, 21 y.o.) and DKA (male, 34 y.o.). The recording progress was made by conditioning the participant to rest and relax. The participant was instructed to hold their breath when the recording started until finished to minimize baseline wander due to electrode movement when the participant breathed. The recording duration is about 5 seconds. Based on Figure 12, we can see that the designed 12 lead ECG can record ECG signals from the human body with relatively low noise even without 50 Hz noise reduction enabled. Therefore the designed ECG differential amplifier and RLD are working. Unfortunately, baseline wander can be seen at lead II, III, and aVF due to participant movement while recording. Other leads have a relatively stable baseline and are adequately recorded. Lead V1 and V3 have low amplitude, which is caused by bad electrode-body contact. Figure 13 is the recording from participant DKA. ECG setting used is 10 mm/mV gain, 25 mm/s timebases, low-pass filter 40 Hz, high-pass filter disabled, and 50 Hz noise reduction disabled. All leads are adequately recorded. Compared to the previous ECG recording in Figure 12, the ECG recording in Figure 13 looks smoother because any high-frequency noise contaminating the ECG is eliminated using a 40 Hz low-pass filter. Many operators prefer this low-pass filter setting instead of recommended 150 Hz low-pass filter because of the smoother waveform. However, it may cause wrong interpretation because most of the functional highfrequency ECG component is also eliminated, and ECG waveform may also be altered (Parola & García-Niebla, 2017). Therefore the usage of a 40 Hz low-pass filter must be carefully done.

Conclusion
The computer-based 12 lead ECG using STM32F401 microcontroller was successfully designed, tested, and used for real-time displaying and recording signals from the function generator and the human body. Our designed ECG technical specifications are 384 times signal gain with an error of less than 5% for one mV typical input voltage, 115.05 dB CMRR over 0.05 -200 Hz frequency range, and 0.05 -200 Hz frequency which is suitable for diagnostic ECG application.